Performance Comparison between Self-timed Circuits and Synchronous Circuits Based on the Technology Roadmap of Semiconductors

Synchronous circuits must have a large clock margin to guarantee correct operations due to delay variations which become main issues in the Moore’s Law-based trend in VLSI chip development. Self-timed asynchronous circuit is a feasible solution to the timing-related problems while it suffers large energy dissipation due to signal transitions in all bits every cycle. The purpose of this study is to compare self-timed asynchronous circuits with synchronous circuits in the view point of speed performance and energy dissipation in the future technologies based on the Technology Roadmap of Semiconductors. As a result, the cycle-time of synchronous circuits becomes large as the process feature size decreases since the maximum delay becomes large due to large variations while the cycle-time of self-timed circuits does not become so large since it depends on the average delay. We can conclude that the self-timed asynchronous circuits are effective in the future technologies.